Liang Fang's Publications (lfang@smu.edu)

 
  1. L. Fang and P. Gui, “A Low-Noise Low-Power Chopper Instrumentation Amplifier with Robust Technique for Mitigating Chopping Ripples", IEEE Journal of Solid-State Circuits, vol. 57, no. 6, pp. 1800-1811, June 2022, doi: 10.1109/JSSC.2022.3151106.

  2. L. Fang, X. Wen, T. Fu, G. Wang, S. Miryala, T. Liu and P. Gui, “A 2.56 GS/s 12-bit 8x-Interleaved ADC with 156.6 dB FoMs in 65 nm CMOS", IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Volume: 30, Issue: 2, Feb. 2022

  3. L. Fang, T. Fu, X. Wen, and P. Gui, " A 12b 1GS/s 61dB SNDR pipelined-SAR ADC with Inverter-based Residual Amplifier and Tunable Harmonic-injecting Cross-coupled-pair for Distortion Cancellation Achieving 6.3fJ/conv-step", IEEE Solid-State Circuits Letters, vol. 57, no. 6, pp. 1800-1811, June 2022, doi: 10.1109/JSSC.2022.3151106.

  4. L. Fang, X. Wen, T. Fu, and P. Gui, "A 12-Bit 1 GS/s RF Sampling Pipeline-SAR ADC with Harmonic Injecting Cross-Coupled Pair Achieving 7.5 fj/conv-step", IEEE Transactions on Circuits and Systems I - Regular Papers (TCAS-I), vol. 69, no. 8, pp. 3225-3236, Aug. 2022, doi: 10.1109/TCSI.2022.3169508.

  5. L. Fang, T. Fu, X. Wen, and P. Gui, "A 1GS/s 82dB Peak-SFDR 12b Single-Channel Pipe-SAR ADC with Harmonic-Injecting Cross-Coupled-Pair and Fast N-replica Bootstrap Switch Achieving 7.5fj/conv-step" IEEE Custom Integrated Circuits Conference (CICC), 2021.

  6. L. Fang and P. Gui, "A 13nV/Hz 4.5uW Chopper Instrumentation Amplifier with Robust Ripple Reduction and Input Impedance Boosting Techniques" IEEE Custom Integrated Circuits Conference (CICC) , Boston, MA, 2020.

  7. L. Fang and P. Gui, "A 14nV/Hz 14uW Chopper Instrumentation Amplifier with Dynamic Offset Zeroing (DOZ) Technique for Ripple Reduction”, Accepted for publication in IEEE Custom Integrated Circuits Conference (CICC), Austin, 2019.