T. Liu, X. Wang, R. Wang, G. Wu, T. Zhang and P. Gui, “A Temperature Compensated Triple-Path PLL with KVCO Non-Linearity Desensitization Capable of Operating at 77 K," accepted to IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I).

T. Zhang, P. Gui, S. Chakraborty, T. Liu, G. Wu, P. Moreira, F. Tavernier, “A 10 Gb/s Distributed-Amplifier-based VCSEL Driver IC in 130-nm CMOS,” submitted to IEEE Journal of Solid-State Circuits (JSSC).

R. Wang, Y.You, G. Wu, X. Wen, T. He, J. Chen, K. Azadet, P.Gui, “A 150 MHz Bandwidth Continuous-Time Sigma-Delta Modulator in 28 nm CMOS with DAC Calibration,” to appear in IEEE MidWest Circuits and Systems Symposium (MWCAS) 2015.

G. Wu, D. Huang, J. Li, P. Gui, T. Liu, S. Guo, Y. Fan, M. Morgan, “A 1-16 Gb/s All-Digital Clock and Data Recovery with a Wideband, High-Linearity Phase Interpolator,” IEEE Transactions on Very Large-Scale Integration (VLSI) Systems, in press.

J. R. Hoff, G. W. Deptuch, G. Wu, and P. Gui, “A Cryogenic Lifetime Studies of 130 nm and 65 nm nMOS Transistors for High-Energy Physics Experiments,” IEEE Transactions on Nuclear Science, Vol. 62, No. 3, June 2015.

S. Guo, T. Liu, T. Zhang, T. Xi, G. Wu, P. Gui, W. Maung, Y. Fan, and M. Morgan, “ A Low-Voltage Low-Power 25 Gb/s Clock and Data Recovery with Equalizer in 65 nm CMOS,” Proceedings of IEEE Radio-Frequency Integrated Circuits (RFIC) 2015.

G. Wu, G. W. Deptuch, J. Hoff, and P. Gui, “Degradations of threshold voltage, mobility and drain current and the dependence on transistor geometry for stressing at 77 K and 300 K,” IEEE Transactions on Device and Materials Reliability, Vol. 14, Iss. 1, pp. 477-483, March 2014.

S. Guo, T. Liu, T. Zhang, G. Wu,T. Xi, P. Gui, W. Maung, M. Morgan, “ A Low-Voltage Low-Power 28 Gb/s Serial-Link Receiver in 65 nm CMOS,” Proceedings of SRC TECHCON 2014.

G. Wu, J. Li, D. Huang, P.Gui, T. Liu, S. Guo, S. Chakraborty, Y. Fan, and M. Morgan, “A 1-16 Gbps All Digital Clock and Data Recovery with a Wideband, High-Linearity Phase Interpolator,” Proceedings of SRC TECHCON 2014.

G. Wu, K. Sun, S. Guo, T. Zhang, T. Xi, R. Wang, and P. Gui, “A low-voltage temperature compensated VCO design,” IEEE Dallas Circuits and Systems Conference (DCAS) 2014.

S. Guo, T. Xi, G. Wu, T. Liu, T. Zhang, P. Gui, Y. Fan and M. Morgan, “A Low-Power 28 Gb/S CDR Using Artificial LC Transmission Line Technique in 65 nm CMOS,” proceedings of IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS) 2014.

G. Wu, B. Yu, P. Gui, P. Moreira, “Wide-range (25 ns) and high-resolution (48.8 ps) clock phase shifter,” IET Electronics Letters, Volume 49, Issue 10, pp642-644, Oct.2013.

R. Hoff, R. Arora, J.D. Cressler, G. W. Deptuch, P. Gui, N.E. Lourenco, G. Wu, R. J. Yarema, “Lifetime Studies of 130nm nMOS Transistors Intended for Long-Duration, Cryogenic High-Energy Physics Experiments,” IEEE Transactions on Nuclear Science, Volume, 59 , Issue: 4, Page(s): 1757 - 1766, Aug. 2012.

J. R. Hoff, R. Arora, J.D. Cressler, G. W. DeptuchP. Gui, N.E. Lourenco, G. Wu, R. J. Yarema, “Lifetime Studies of 130nm nMOS Transistors Intended for Long-Duration, Cryogenic High-Energy Physics Experiments,” Proceedings of IEEE Nuclear Science Symposium, 2011.