Publications and Patents


Journal Papers Authored or Coauthored

J. W. Fattaruso and R. G. Meyer, "Triangle-to-sine wave conversion with MOS technology", IEEE J. Solid State Circuits, April 1985, p. 623.

J. W. Fattaruso and R. G. Meyer, "MOS analog function synthesis", IEEE J. Solid State Circuits, December 1987, p. 1056.

R. K. Hester, K.-S. Tan, M. de Wit, J. W. Fattaruso, S. Kiriaki and J. R. Hellums, "Fully differential ADC with rail-to-rail common-mode range and nonlinear capacitor compensation", IEEE J. Solid State Circuits, February 1990, p. 173.

J. W. Fattaruso, M. de Wit, G. Warwar, K.-S. Tan and R. K. Hester, "The effect of dielectric relaxation on charge-redistribution A/D converters", IEEE J. Solid State Circuits, December 1990, p. 1550.

K.-S. Tan, S. Kiriaki, M. de Wit, J. W. Fattaruso, C.-Y. Tsay, W. E. Matthews and R. K. Hester, "Error correction techniques for high-performance differential A/D converters", IEEE J. Solid State Circuits, December 1990, p. 1318.

J. W. Fattaruso, S. Kiriaki, G. Warwar and M. de Wit, "Self-calibration techniques for a second-order multibit sigma-delta modulator", IEEE J. Solid State Circuits, December, 1993.

J. W. Fattaruso, S. S. Mahant-Shetti and J. B. Barton, "A Fuzzy Logic Inference Processor", IEEE J. Solid State Circuits, April 1994.

Served as guest editor of the IEEE J. Solid State Circuits, December 1997.

D. Gata, J. Hochschild, W. Sjursen, J. W. Fattaruso, L. Fang, C. Branch, J. Holmes, Z. Jiang, S. Chen, K. Ling, E. Petilli, M. Skorcz, R. Dickerson, and W. Severin, "A 1.1V 270µA Mixed-Signal Hearing Aid Chip", IEEE J. Solid State Circuits, December 2002, p. 1670.

J. W. Fattaruso and B. Sheahan, "A 3V, 4.25Gb/s laser driver with 0.4V output voltage compliance", IEEE J. Solid State Circuits, August 2006.

K. Chandrashekar, M. Corsi, J.W. Fattaruso, and B. Bakkaloglu, "A 20MS/s to 40MS/s Reconfigurable Pipeline ADC Implemented With Parallel OTA Scaling", IEEE Trans. on Circuits and Systems-II, Aug. 2010, p 602.

J. W. Fattaruso, "New Graphical Tools for Visualizing the Laplace and z-Domains", IEEE Circuits and Systems Magazine, 3rd Quarter 2017


Other Publications

J. W. Fattaruso and L. A. Williams, "Oversampled Analog-to-Digital and Digital-to-Analog Converters", an invited chapter in the CRC Handbook of VLSI Design, published 1999, second edition published 2007.


Conference Presentations Authored or Coauthored

J. W. Fattaruso and R. G. Meyer, "Nonlinear analog function synthesis with MOS technology", IEEE Custom IC Conf., May 1987, Portland, OR.

C. Kaya, H. Tigelaar, J. Paterson, M. de Wit, J. W. Fattaruso, R. Hester, S. Kiriaki, K.-S. Tan and C.-Y. Tsay, "Polyside/Metal Capacitors for High Precision A/D Converters," IEEE International Electron Devices Meeting, Technical Digest, pp. 782-785, San Francisco, 1988.

R. Hester, K. Tan, M. de Wit, J. W. Fattaruso, S. Kiriaki, C.-Y. Tsay, C. Kaya, J. Paterson and H. Tigelaar, "Analog-to-digital Converter with Non-linear Capacitor Compensation", IEEE Symposium on VLSI Circuits, Digest of Technical Papers, pp. 57-58, May 1989.

K.-S. Tan, S. Kiriaki, M. De Wit, J. W. Fattaruso, C.-Y. Tsay, W. E. Matthews and R. K. Hester, "A 5V, 16b, 10us differential CMOS ADC", Intl. Solid State Circuits Conf., February 1990, San Francisco.

J. W. Fattaruso, M. De Wit, G. Warwar, K.-S. Tan and R. K. Hester, "The effect of dielectric relaxation on charge-redistribution A/D converters", IEEE Symposium on VLSI Circuits, June 1990, Honolulu.

J. W. Fattaruso, S. Kiriaki, G. Warwar and M. de Wit, "Self-calibration techniques for a second-order multibit sigma-delta modulator", Intl. Solid State Circuits Conf., February, 1993, San Francisco.

J. W. Fattaruso, S. S. Mahant-Shetti and J. B. Barton, "A Fuzzy Logic Inference Processor", IEEE Symposium on VLSI Circuits, Kyoto, Japan, May 1993.

Served on evening panel discussion of analog scaling techniques at the IEEE Symposium on VLSI Circuits, Kyoto, Japan, May 1993.

J. W. Fattaruso, S. S. Mahant-Shetti and J. B. Barton, "A Fuzzy Logic Inference Processor", Third International Conference on Industrial Fuzzy Control and Intelligent Systems (IFIS) Houston, December 1993.

S.-P. Jeng, K. Taylor, T. Seha, M.-C. Chang, J. W. Fattaruso and R. H. Haveman, "Highly Porous Interlayer Dielectric for Interconnect Capacitance Reduction", presented at the IEEE Symposium on VLSI Technology, May 1995.

J. W. Fattaruso, "Opamp Compensation for Low-Voltage, Mixed-Signal Designs", invited tutorial for the 1998 Intl. Solid State Circuits Conf., February, 1998.

Served as member of the Analog Program Subcommittee of the Intl. Solid State Circuits Conf., 1996-2000.

J. W. Fattaruso, "Low-Voltage Analog CMOS Circuit Techniques", (invited) presented at the 1999 VLSI-TSA conference, June, 1999.

J. W. Fattaruso, J. Hochschild, W. Sjursen, L. Fang, D. Gata, C. Branch, J. Holmes, Z. Jiang, S. Chen, K. Ling, E. Petilli, M. Skorcz, R. Dickerson, and W. Severin, "Analog-Processing Circuits for a 1.1V 270µA Mixed-Signal Hearing-Aid Chip", Intl. Solid State Circuits Conf., February 2002, San Francisco.

J. W. Fattaruso, "Current trends in analog design for SOC", invited short course lecture for the 2003 Intl. Solid State Circuits Conf., February, 2003.

J. W. Fattaruso and B. Sheahan, "A 3V, 4.25Gb/s Laser Driver with 0.4V Output Voltage Compliance", IEEE Custom IC Conf., September 2005, San Jose, CA.

B. Sheahan, J. W. Fattaruso, J. Wong, K. Muth, B. Murmann, "4.25 Gb/s Laser Driver: Design Challenges and EDA Tool Limitations", Design Automation Conference, San Francisco CA, July 2006

J. W. Fattaruso, "Visualizing the Laplace Domain", IEEE ISCAS, May 2016, Montreal, Canada


U.S. Patents Granted

J. W. Fattaruso, "Comparator circuit having a fast recovery time", issued number 4,883,987, November 28, 1989.

J. W. Fattaruso and V. Gopinathan, "Common-mode feedback bias generator for operational amplifiers", issued number 4,933,644, June 12, 1990.

K.-S. Tan, R. K. Hester and J. W. Fattaruso, "Analog-to-digital converter with non-linear error correction", issued number 4,975,700, December 4, 1990.

J. W. Fattaruso and K.-S. Tan, "Dielectric relaxation correction circuit for charge-redistribution A/D converters", issued number 5,248,974, September 28, 1993.

J. W. Fattaruso and J. R. Hellums, "Amplifier circuit", issued number 5,136,255, August 4, 1992.

J. W. Fattaruso, "Digital-to-analog converter for sigma-delta modulator", issued number 5,305,004, April 19, 1994.

J. W. Fattaruso, "Analog voltage maximizer and minimizer circuits", issued number 5,414,310, May 9, 1995.

S. S. Mahant Shetti and J. W. Fattaruso, "Current Controlled Oscillator", issued number 5,345,196, September 6, 1994.

J. W. Fattaruso, "Feedback amplifier for regulated cascode gain enhancement", issued number 5,451,909, September 19, 1995.

J. W. Fattaruso, "CMOS Clock Drivers with Inductive Coupling", issued number 5,508,639, September, 1996.

J. W. Fattaruso, "Voltage Controlled Oscillator with Wide Frequency Range and Low Noise for Integrated Circuit Application", issued number 6,150,893, November 21, 2000.

J. W. Fattaruso, "Monolithic inductor with guard rings", issued number 6,160,303, December 12, 2000.

S. Mahant-Shetti and J. W. Fattaruso, "Resistor String Digital-to-Analog Converter with Boosted Control Based on Differential Input Between Successive Received Input Words", issued number 6,222,474, April 24, 2001.

A. Gatherer and J. W. Fattaruso, "Method and System for Analog to Digital Conversion", issued number 6,154,497, November 28, 2000.

P. Landman, W. Lee, J. W. Fattaruso, "Digitally-Controlled Oscillator with Switched-Capacitor Frequency Control", issued number 6,028,488, February 22, 2000.

S. Mahant-Shetti, Debapriya Sahu and J. W. Fattaruso, "Data Converter with Horizontal Diffusion Resistor Meander", issued number 6,127,957, October 3, 2000.

J. W. Fattaruso, "Multistage Amplifier Circuit with Improved Nested Transconductance Capacitance Compensation", issued number 6,150,884, November 21, 2000.

J. W. Fattaruso and S. Mahant-Shetti, "Auto-Calibrating Resistor String in a Data Converter", issued number 6,204,785, March 20, 2001.

J. W. Fattaruso and S. Mahant-Shetti, "Data Converter with Reduced Supply and Resistor String Voltages", issued number 6,239,731, May 29, 2001.

J. W. Fattaruso and S. Mahant-Shetti, "Analog-to-Digital Converter with Flash Access to Digital-to-Analog Resistor String", issued number 6,246,352, June 12, 2001.

S. Mahant-Shetti and J. W. Fattaruso, "Bit Interpolation in Resistor String Data Converter", issued number 6,268,819, July 31, 2001.

S. Mahant-Shetti and J. W. Fattaruso, "Resistor Elements in a Resistor Divider Digital-to-Analog Converter", issued number 6,307,495, October 23, 2001.

J. W. Fattaruso and D. George Gata, "Common Mode Feedback Bias for Low Voltage Opamps", issued number 6,388,522, May 21, 2002.

J. W. Fattaruso, "Driver with Tail Currents in Discrete Subranges", issued number 6,792,019, September 14, 2004, TI-33693.

W. Sjursen, D. George Gata and J. W. Fattaruso, "Low Distortion Compression Amplifier", issued number 6,927,632, August 9, 2005.

J. W. Fattaruso, "Master-Slave Latch With Transparent Mode", issued number 6,850,104, February 1, 2005.

J. W. Fattaruso, "Differential circuit with current overshoot suppression", issued number 6,870,389, March 22, 2005.

J. W. Fattaruso, "Driver Apparatus and Method of Operation Thereof", issued number 7,116,169, October 3, 2006.

J. W. Fattaruso and M. Corsi, "Pipelined analog-to-digital converter", issued number 7,528,759, May 5, 2009.

J. W. Fattaruso and B. Sheahan, "Apparatus and method for shifting a signal from a first reference level to a second reference level", issued number 7,535,280, May 19, 2009.

J. W. Fattaruso, "Low Power Low Voltage Differential Signaling (LVDS) Output Drivers", No. 7,777,531, August 17, 2010.

J. W. Fattaruso, "High Speed, Symmetrical Prescaler", No. 7,796,721, September 14, 2010.


U.S. Patents in Application Process

J. W. Fattaruso, "LC Voltage Controlled Oscillator Tank with Linearized Frequency Control", No. 20100102859, April 29, 2010.