// Model a four-bit CLA generator
module clagen (C, P, G, cin);
   output [4:1] C;
   input  [3:0] P, G;
   input  cin;

// YOUR CODE GOES HERE

endmodule

// Model a four-bit CLA adder
module cla4 (cout, Sum, A, B, cin);
   output [3:0] Sum;
   output cout;
   input  [3:0] A, B;
   input  cin;

// YOUR CODE GOES HERE

endmodule

// Testbench for 4-bit  CLA adder
module clatest;
  reg [3:0] a, b;
  reg cin0;
  wire [3:0] sum;
  wire cout4;
  cla4 u1 (cout4, sum, a, b, cin0);
  initial
     begin
       $stop;
       #10;
       a=4'h0; b=4'h0; cin0=1'b0;
       #10;
       a=4'hf; b=4'hf; cin0=1'b0;
       #10;
       a=4'h0; b=4'h0; cin0=1'b1;
       #10;
       a=4'hf; b=4'hf; cin0=1'b1;
       #10;
       a=4'h5; b=4'ha; cin0=1'b0;
       #10;
       a=4'h5; b=4'h5; cin0=1'b0;
       #10;
       a=4'ha; b=4'ha; cin0=1'b0;
       #10;
       a=4'h5; b=4'ha; cin0=1'b1;
       #10;
       a=4'ha; b=4'h5; cin0=1'b1;
       #10;
       a=4'h1; b=4'hf; cin0=1'b1;
       #10;
       a=4'hf; b=4'h1; cin0=1'b0;
       #10;
       a=4'h7; b=4'h7; cin0=1'b1;
       #10;
       a=4'h8; b=4'h7; cin0=1'b1;
       #10;
       $stop;
   end
endmodule